CD40175-Quad D-type flip-flop


CD40175 belongs to 4000 Series CMOS Logic Family of Integrated Circuits (IC’s) constructed with N- and P-channel enhancement mode transistors. CD40175 has a Quad D-type flip-flop

CD40175 has a supply voltage range of 5V to 20V, which is much higher than any contemporary logic family. It has buffered output which improves transfer characteristics by providing very high gain. All inputs are protected against static discharge with diodes to VDD and VSS.

CD40175 Features

  • 100% Tested for Maximum Quiescent Current at 20V
  • 5V, 10V, and 15V Parametric Ratings
  • Maximum Input Current of 1μA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
  • Noise Margin (Over Full Package Temperature Range):
    • 1V at VDD = 5V
    • 2V at VDD = 10V
    • 2.5V at VDD = 15V

CD40175 Specifications

Absolute Maximum Ratings

  • DC Supply Voltage Range, (VDD): -0.5V to +20V (Voltage Referenced to VSS Terminals)
  • Input Voltage Range, All Inputs: -0.5V to VDD +0.5V
  • DC Input Current, Any One Input: ±10mA
  • Operating Temperature Range: -55oC to +125oC Package Types D, F, K, H
  • Storage Temperature Range (TSTG): -65oC to +150oC
  • Lead Temperature (During Soldering): +265oC
    • At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum

CD40175 Pinout Diagram

CD40175 Pin Description

Pin NoPin NameDescription
1CLEAR’Invert Clear Pin
2Q1Output Of D Flip Flop 1
3Q1′Invert Output Of D Flip Flop 1
4D1 NOR Gate 1 Input 2
5D2 NOR Gate 1 Input 3
6Q2′ Invert Output Of D Flip Flop 1
7Q2 Output Of D Flip Flop 2
8VSSSupply Voltage
9CLOCKClock Pin
10Q3 Output Of D Flip Flop 3
11Q3′ Invert Output Of D Flip Flop 3
12D3 NOR Gate 1 Input 2
13D4 NOR Gate 1 Input 3
14Q4′Invert Output Of D Flip Flop 4
15Q4 Output Of D Flip Flop 4
16VDDDrain Voltage

CD40175 Circuit


  • Shift registers
  • Buffer/storage registers
  • Pattern generators

CD40175 Alternative Equivalent

Download CD40175-Quad D-type flip-flop Datasheet from the link given below.