TL555I Datasheet – LinCMOS Timer IC



The TLC555 is a monolithic timing circuit fabricated using the TI LinCMOS™ process. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2 MHz. Because of its high input impedance, this device supports smaller timing capacitors than those supported by the NE555 or LM555. As a result, more accurate time delays and oscillations are possible.

Power consumption is low across the full range of power-supply voltage.
Like the NE555, the TLC555 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by the use of the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge terminal (DISCH) and GND. All unused inputs must be tied to an appropriate logic level to prevent false triggering

Part NumberTL555I, TL555IID, TL555IDR ( Marking TL555I )
FunctionLinCMOS Timer
PackageSOIC 8 Pin
Manufacturer Texas Instruments
DatasheetDownload PDF AM5890S pdf

TL555I Features

  • Very low power consumption:
    • 1-mW typical at VDD = 5 V
  • Capable of operation in astable mode
  • CMOS output capable of swinging rail to rail
  • High output current capability
    • Sink: 100-mA typical
    • Source: 10-mA typical
  • Output fully compatible with CMOS, TTL, and MOS
  • Low supply current reduces spikes during output transitions
  • Single-supply operation from 2 V to 15 V
  • Functionally interchangeable with the NE555; has the same pinout
  • ESD protection exceeds 2000 V per MIL-STD- 883C, method 3015.2
  • Available in Q-temp automotive
    • High-reliability automotive applications
    • Configuration control and print support
    • Qualification to automotive standards

TL555I Absolute Maximum Ratings

  VoltageSupply, VDD(2)–0.318V
Input, any input–0.3VDD
  CurrentSink, discharge or output150mA
Source, output, IO15
      Temperature    Operating, TAC-suffix070°C
Case, for 60 secondsFK package–65150
Storage, Tstg–65150

1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2) All voltage values are with respect to network GND.

TL555I Pinout

Pin Definitions

CONT5IControls comparator thresholds. Outputs 2/3 VDD and allows bypass capacitor connection.
DISCH7OOpen collector output to discharge timing capacitor.
NCNo internal connection.
OUT3OHigh current timer output signal.
RESET4IActive low reset input forces output and discharge low.
THRES6IEnd of timing input. THRES > CONT sets output low and discharge low.
TRIG2IStart of timing input. TRIG < 1/2 CONT sets output high and discharge open.
VDD8Power-supply voltage.


  • Precision timing
  • Pulse generation
  • Sequential timing
  • Time delay generation
  • Pulse width modulation
  • Pulse position modulation
  • Linear ramp generator

TL555I Datasheet

Download the TL555I IC Datasheet from the link given below.