The 74LS series of integrated circuits (ICs) was one of the most popular logic families of transistor-transistor logic (TTL) logic chips. 74LS series is a bipolar, low-power Schottky IC. 74LS109 contains two independent J-K positive edge-triggered flip-flops. A low level at the preset or clear inputs set or reset the outputs regardless of the levels of the other inputs.
74LS109 Features
- Two Independent JK Positive Edge Triggered Flip-Flops
- Separate Preset and Clear Inputs
- Fast Switching Times
- Operating Temperature up to 70°C
- Standard TTL Switching Voltages
74LS109 Specifications
| Supply Voltage | 4.75 – 5.25Vdc |
| Maximum Clock Frequency | 40Mhz |
| Power Dissipation | 2mW/gate @100kHz |
| Minimum Output Current | 8mA |
| Propagation Delay | 10nS |
| Fan Out (TTL Loads) | 20 |
74LS109 Pinout Diagram
74LS109 Pin Description
| Pin No | Pin Name | Description |
| 1 | CD | Digital Clock |
| 2 | J1 | Data Input J1 |
| 3 | K1 | Data Input K1 |
| 4 | CP | Clear Pin/Clock Pin |
| 5 | SD | Serial Data Pin |
| 6 | Q1 | Active High Output Q1 |
| 7 | Q1′ | Active Low Output Q1′ |
| 8 | GND | Ground |
| 9 | Q2 | Active High Output Q2 |
| 10 | Q2′ | Active Low Output Q2′ |
| 11 | SD | Serial Data Pin |
| 12 | CP | Clear Pin/Clock Pin |
| 13 | K2 | Data Input K2 |
| 14 | J2 | Data Input J2 |
| 15 | CD | Digital Clock Pin |
| 16 | VCC | Positive Supply |
Applications
- Event Detectors
- Data Synchronizers
- Frequency Divider
74LS109 Alternative Equivalent
74LS107, 74LS112
Download 74LS109 Dual J-K Positive Edge-triggered Flip-Flop Datasheet from the link given below.
