74LS109 Dual J-K Positive Edge-triggered Flip-Flop


The 74LS series of integrated circuits (ICs) was one of the most popular logic families of transistor-transistor logic (TTL) logic chips. 74LS series is a bipolar, low-power Schottky IC. 74LS109 contains two independent J-K positive edge-triggered flip-flops. A low level at the preset or clear inputs set or reset the outputs regardless of the levels of the other inputs.

74LS109 Features

  • Two Independent JK Positive Edge Triggered Flip-Flops
  • Separate Preset and Clear Inputs
  • Fast Switching Times
  • Operating Temperature up to 70°C
  • Standard TTL Switching Voltages

74LS109 Specifications

Supply Voltage4.75 – 5.25Vdc
Maximum Clock Frequency40Mhz
Power Dissipation2mW/gate @100kHz
Minimum Output Current8mA
Propagation Delay10nS
Fan Out (TTL Loads)20

74LS109 Pinout Diagram

74LS109 Pin Description

Pin NoPin NameDescription
1CDDigital Clock
2J1Data Input J1
3K1Data Input K1
4CPClear Pin/Clock Pin
5SDSerial Data Pin
6Q1Active High Output Q1
7Q1′Active Low Output Q1′
9Q2Active High Output Q2
10Q2′Active Low Output Q2′
11SDSerial Data Pin
12CPClear Pin/Clock Pin
13K2Data Input K2
14J2Data Input J2
15CDDigital Clock Pin
16VCCPositive Supply


  • Event Detectors
  • Data Synchronizers
  • Frequency Divider

74LS109 Alternative Equivalent

74LS107, 74LS112

Download 74LS109 Dual J-K Positive Edge-triggered Flip-Flop Datasheet from the link given below.