The 74LS series of integrated circuits (ICs) was one of the most popular logic families of transistor-transistor logic (TTL) logic chips. 74LS series is a bipolar, low-power Schottky IC. The 74LS137 is a three to eight decoder with latched address inputs, one standard output strobe (G1), and one active-low output strobe (G2). When the latch enable (GL) input is low, the device acts as a standard three to eight decoder

74LS137 Features
- Three to Eight Line Decoder with Latches on the Address Inputs
- Two Enable Inputs for Cascading
- Low Power Dissipation
- Operating Temperature up to 70°C
- Standard TTL Switching Voltages
74LS137 Specifications
Supply Voltage | 4.75 – 5.25Vdc |
Maximum Clock Frequency | 40Mhz |
Power Dissipation | 2mW/gate @100kHz |
Minimum Output Current | 8mA |
Propagation Delay | 10nS |
Fan Out (TTL Loads) | 20 |
74LS137 Pinout Diagram

74LS137 Pin Description
Pin No | Pin Name | Description |
1 | A | Data Input Select Pin |
2 | B | Data Input Select Pin |
3 | C | Data Input Select Pin |
4 | GL | Enable Pin |
5 | G2 | Enable Pin |
6 | G1 | Enable Pin |
7 | Y7 | Output 7 |
8 | GND | Ground |
9 | Y6 | Output 6 |
10 | Y5 | Output 5 |
11 | Y4 | Output 4 |
12 | Y3 | Output 3 |
13 | Y2 | Output 2 |
14 | Y1 | Output 1 |
15 | Y0 | Output 0 |
16 | VCC | Positive Supply |
74LS137 Circuit
Applications
- Encoders are used to input data to a specified output line as is done in addressing core memory where input data is to be stored in a specified memory location.
- It is used in code conversions.
- In high-performance memory systems, this decoder can be used to minimize the effects of system decoding.
74LS137 Alternative Equivalent
74LS138
Download 74LS137 3 to 8 Line Decoder Datasheet from the link given below.