The 74LS series of integrated circuits (ICs) was one of the most popular logic families of transistor-transistor logic (TTL) logic chips. 74LS series is a bipolar, low-power Schottky IC. 74LS75 contains a 4-bit Bi-Stable Latch. These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units.

74LS75 Features
- Designed as a Temporary Storage for Binary Information
- Latches Feature Complementary Q Outputs
- Fast Switching Speed
- Operating Temperature up to 70°C
- Standard TTL Switching Voltages
74LS75 Specifications
| Supply Voltage | 4.75 – 5.25Vdc |
| Maximum Clock Frequency | 40Mhz |
| Power Dissipation | 2mW/gate @100kHz |
| Minimum Output Current | 8mA |
| Propagation Delay | 10nS |
| Fan Out (TTL Loads) | 20 |
74LS75 Pinout Diagram

74LS75 Pin Description
| Pin No | Pin Name | Description |
| 1 | 1Q’ | Invert Output Pin Latch 1 |
| 2 | 1D | Data Input Pin Latch 1 |
| 3 | 2D | Data Input Pin Latch 2 |
| 4 | 3C,4C | NAND Gate 2 Input 2 |
| 5 | VCC | NAND Gate 2 Input 2 |
| 6 | 3D | Data Input Pin Latch 3 |
| 7 | 4D | Data Input Pin Latch 4 |
| 8 | 4Q’ | Invert Output Pin Latch 4 |
| 9 | 4Q | Output Pin Of Latch 4 |
| 10 | 3Q | Output Pin Of Latch 3 |
| 11 | 3Q’ | Invert Output Pin Latch 3 |
| 12 | GND | NAND Gate 3 Input 2 |
| 13 | 1C,2C | NAND Gate 3 Input 2 |
| 14 | 2Q’ | Invert Output Pin Latch 2 |
| 15 | 2Q | |
| 16 | 1Q | Positive Supply |
74LS75 Circuit
Here is a simple circuit of SR Latch using Logic Gate AND and NOR.

Applications
74LS75 Alternative Equivalent
Download 74LS75 4-bit Bi-Stable Latch Datasheet from the link given below.




