CD4015 belongs to the 4000 Series CMOS Logic Family of Integrated Circuits (IC’s) constructed with N- and P-channel enhancement mode transistors. CD4015 has Dual 4-stage Static Shift Register
CD4015 has a supply voltage range of 5V to 20V, which is much higher than any contemporary logic family. It has buffered output which improves transfer characteristics by providing very high gain. All inputs are protected against static discharge with diodes to VDD and VSS.
CD4015 Features
- Medium Speed Operation 12MHz (typ.) Clock Rate at VDD -VSS = 10V
- Fully Static Operation
- 8 Master-Slave Flip-Flops Plus Input and Output Buffering
- 100% Tested For Quiescent Current at 20V
- 5V, 10V and 15V Parametric Ratings
- Standardized Symmetrical Output Characteristics
CD4015 Specifications
Absolute Maximum Ratings
- DC Supply Voltage Range, (VDD): -0.5V to +18V
- Input Voltage Range, All Inputs: -0.5V to VDD +0.5V
- Storage Temperature Range (TSTG): -65oC to +150oC
- Lead Temperature (During Soldering): +260oC
CD4015 Pinout Diagram
CD4015 Pin Description
| Pin No | Pin Name | Description |
| 1 | CLK B | Clock Pin B |
| 2 | Q4B | Output Of Shift Register B |
| 3 | Q3A | Output Of Shift Register A |
| 4 | Q2A | Output Of Shift Register A |
| 5 | Q1A | Output Of Shift Register A |
| 6 | RESET A | Reset Pin A |
| 7 | DATA A | Data Pin A |
| 8 | VSS | Supply Voltage |
| 9 | CLK A | Clock Pin A |
| 10 | Q4A | Output Of Shift Register A |
| 11 | Q3B | Output Of Shift Register B |
| 12 | Q2B | Output Of Shift Register B |
| 13 | Q1B | Output Of Shift Register B |
| 14 | RESET B | Reset Pin B |
| 15 | DATA B | Data Pin B |
| 16 | VDD | Drain Voltage |
CD4015 Circuit
Applications
- The shift registers are used for temporary data storage.
- The shift registers are also used for data transfer and data manipulation.
CD4015 Alternative Equivalent
CD4006, CD4021
Download CD4015 Dual 4-stage Static Shift Register Datasheet from the link given below.
