CD4512 belongs to the 4000 Series CMOS Logic Family of Integrated Circuits (IC’s) constructed with N- and P-channel enhancement mode transistors. CD4512 has 8-channel Data Selector
CD4512 has a supply voltage range of 5V to 20V, which is much higher than any contemporary logic family. It has buffered output which improves transfer characteristics by providing very high gain. All inputs are protected against static discharge with diodes to VDD and VSS.
CD4512 Features
- Wide supply voltage range: 3.0V to 15V
- High noise immunity: 0.45 VDD (typ.)
- 3-STATE output
- Low quiescent power dissipation: 0.25 µW/package (typ.) @ VCC = 5.0V
CD4512 Specifications
Absolute Maximum Ratings
- DC Supply Voltage Range, (VDD): -0.5V to +18V (Voltage Referenced to VSS Terminals)
- Input Voltage Range, All Inputs: -0.5V to VDD +0.5V
- DC Input Current, Any One Input: ±10mA
- Power Dissipation (P D)
- Dual-In-Line 700 mW
- Small Outline 500 mW
- Storage Temperature Range (TSTG): -65oC to +150oC
- Lead Temperature (During Soldering): +260oC
- At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum
CD4512 Pinout Diagram
CD4512 Pin Description
| Pin No | Pin Name | Description |
| 1 | X0 | Channel Input Pin 1 |
| 2 | X1 | Channel Input Pin 2 |
| 3 | X2 | Channel Input Pin 3 |
| 4 | X3 | Channel Input Pin 4 |
| 5 | X4 | Channel Input Pin 5 |
| 6 | X5 | Channel Input Pin 6 |
| 7 | X6 | Channel Input Pin 7 |
| 8 | VSS | Supply Voltage |
| 9 | X7 | Channel Input Pin 8 |
| 10 | INHIBIT | Inhibit Pin |
| 11 | A | Address Input Pin A |
| 12 | B | Address Input Pin B |
| 13 | C | Address Input Pin C |
| 14 | Z | Select Output Pin |
| 15 | OE’ | 3-State Disable Pin |
| 16 | VDD | Drain Voltage |
CD4512 Circuit
Applications
- Digital multiplexing
- Number-sequence generation
- Signal gating
CD4512 Alternative Equivalent
Download CD4512 8-channel Data Selector Datasheet from the link given below.
